NMOS logic

Lore & Background

NMOS transistors operate by creating an inversion layer (n-channel) in a p-type transistor body, allowing electrons to flow between source and drain. The n-channel is formed by applying voltage to the gate terminal. NMOS transistors have four modes: cut-off, triode, saturation, and velocity saturation.

NMOS AND-by-default logic could produce unusual glitches, such as the 6502 'illegal opcodes' absent in CMOS versions. In some cases, like Commodore's VIC-II chip, these bugs were exploited by programmers for graphics effects.

For many years, NMOS circuits were much faster than comparable PMOS and CMOS circuits. They were also easier to manufacture than CMOS, which required special n-wells. However, NMOS had high static power dissipation and heat output, reducing reliability, especially with large process nodes in the 1970s.

Reader's Guide

NMOS logic was a dominant technology for integrated circuits in the 1970s and 1980s, particularly for active components like CPUs and graphics processors. Its speed advantage over PMOS and early CMOS made it the preferred choice for computers of that era. The earliest microprocessors were PMOS, but by the late 1970s NMOS microprocessors had overtaken them. CMOS microprocessors were introduced in 1975 but did not become dominant until the 1980s.

The major drawback of NMOS was static power dissipation—a direct current flowed through a logic gate even when the output was steady, leading to high power consumption and heat generation. This contrasted with CMOS, which generated almost no heat unless transistor count approached 1 million. NMOS circuits were also more susceptible to noise than CMOS due to asymmetric input logic levels.

Throughout the 1980s, both NMOS and CMOS parts were widely used, with CMOS becoming more widespread. Some chips, like the Motorola 68030, were hybrids with both NMOS and CMOS sections. Since the 1990s, CMOS has been near-universal in integrated circuits. NMOS logic's legacy includes its role in early microprocessors and graphics chips, and the exploitation of its bugs by programmers for creative effects.

Did You Know?

• NMOS logic uses n-type enhancement mode transistors arranged in a pull-down network between the output and ground.
• NMOS circuits are slow to transition from low to high because the resistance between output and positive supply is much greater than the resistance to ground.
• The first IBM NMOS product was a 1 kb memory chip with 50–100 ns access time, entering large-scale manufacturing in the early 1970s.
• NMOS AND-by-default logic could produce unusual glitches, such as the 6502 'illegal opcodes' absent in CMOS versions.